Contract chipmaker TSMC has introduced a brand new manufacturing process which has been dubbed N4P. Despite the identify, like N4, it is a tweaked model of the N5 process know-how. TSMC describes N4P as a “performance-focused enhancement of the 5-nanometer technology platform,” and it says it will probably ship enhancements throughout the board – with regard to efficiency, effectivity, and density.
Pondering over the naming/household to start out with, there have been 5 5-nanometer processes launched by TSMC to this point. It began with N5, which branched with offshoots to N5P and N5HPC. Then there was N4, which has been improved to ship the brand new N4P.
Talking of efficiency comparisons and so forth, TSMC says that the brand new N4P can provide “up to 11 per cent more performance than the N5 process,” however when in comparison with N4, it is just a 6 per cent uplift. Other comparisons given solely the brand new process vs N5, the N4P being 22 per cent extra power environment friendly with a six per cent improve in transistor density.
An underlying high quality of N4P which can make it extra profitable/fashionable is that it additionally provides decreased complexity, with wafer cycle time reduce, as it requires fewer masks. Of course, machine time is cash, so it is a worthwhile enchancment.
Lastly, N4P is alleged to be nicely-supported by TSMC’s complete design ecosystem for silicon IP and Electronic Design Automation (EDA). Current prospects can simply migrate from different 5-nanometer platforms, for quicker and extra energy-environment friendly product refreshes with minimal effort.
Expect the primary TSMC N4P tape-outs in H2 subsequent 12 months, with product launches across the similar time as N3 (providing full node scaling in comparison with N5) debuts in 2023, with N4P representing value but nonetheless a really trendy answer.
